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[VHDL-FPGA-Verilog] Verilog_HDL_elevator

Description: Verilog实现的基于FPGA的五层楼电梯运行控制逻辑设计-FPGA-based five-story elevator control logic implemented in Verilog design
Platform: | Size: 18432 | Author: 柯家豪 | Hits:

[OS program] dianti100

Description: 一个VERILOG编的电梯模拟程序，有一点小问题，要的话去修改一下。-The elevator made a Verilog simulation program, it is a small problem, it is necessary to so to make some corrections.
Platform: | Size: 2048 | Author: mei52802 | Hits:

[VHDL-FPGA-Verilog] dttrytwo

Description: 电梯控制器，可以实现多人多楼层上下的,用的verilog，板子basys2-elevator controller
Platform: | Size: 748544 | Author: 李 | Hits:

[VHDL-FPGA-Verilog] StateMachine

Description: VERILOG语言，ISE13.4实现的步进电梯的状态机，可以仿真。-VERILOG language, ISE13.4 achieve step elevator state machine can be simulated.
Platform: | Size: 207872 | Author: tom | Hits:

[VHDL-FPGA-Verilog] 双电梯控制器

Description: 使用verilog实现的双电梯控制器，1-9层，仿真通过(a bi-elevator controller written in VerilgHDL, which has floor1-9, simulation passed)
Platform: | Size: 250880 | Author: gothic22 | Hits:
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